In a NAND flash memory, in general, error correction is performed for data to be stored. In recent years, with the development of a miniaturization technique and a super multi-level cell technique in the NAND flash memory, the probability of an error occurring in the storage data has increased.
When the probability of an error occurring in data increases with the development of a miniaturization technique and a super multi-level cell technique of the NAND flash memory, the amount of parity data required to maintain data validity after error correction increases. This means an increase in the memory size required for retaining the parity data, which causes an increase in costs. Alternatively, when the amount of parity data is not increased and error correction capability is not improved in order to prevent an increase in costs, it is difficult to correct an error in the storage data and the probability of the error remaining increases.